Just a little over a month ago, Micron and Intel announced a partnership to manufacture a line of 3D NAND based solid state drives (SSDs). While this is a possible end result of lowering overall SSD pricing on high-capacity (1TB-4TB) consumer drives, Micron is also poised to offer very price-competitive 3D triple-level cell (TLC) NAND in hopes of gaining a large share of the NAND market.
A few short weeks later, both companies released an update on their new chips. Claiming 256 Gbits in a new multi-level cell (MLC) and 384 Gbits in TLC, the company could make a huge impact in the mobile and smartphone markets. As much as 10TB may fit into a standard 2.5-inch SSD very soon. 256Gbit samples are already at select companies while the 384Gbit samples are expected later this spring. Full production is forecasted to begin in 4Q15.
The main factor allowing Micron and Intel to produce such high density chips is what is known as a floating gate. A floating gate is a barrier between the control gate and channels inside a NAND chip that regulates channels depending on the charge going through the chip. These types of gates can be risky to manufacture and may not be superior to charge traps because they wear out the tunnel oxide quicker. However, Micron claims to have been regularly using floating gates and their new chips should not wear any quicker than comparable 2D chips.
When it comes to 3D NAND, the current stack for stacked levels is 32 levels. Both Samsung and Micron are producing at this height. But Toshiba has decided to level up and is launching the first 48-layer flash memory called BiCS. Just like its competitors, this new product line is aimed at SSDs and will boast higher endurance and write speeds. The cell structure will consist of a 2-bit-per-cell 128-Gigabit layout, resulting in a 16Gigabyte (GB) storage capacity that will be suited for many other applications and is yet another advancement in the ever-changing NAND market.