Will Reworked Balance Sheets Rebalance the Power in the Semiconductor Supply Chain?


Foundries may seem like an ocean away from the monthly and quarterly machinations of today’s volatile consumer market, but this is not the case.  While the downtrend in capital expenditures (CAPEX) by semiconductor suppliers predates this year’s wild global economic ride and the past two years’ memory market collapse, the foundries’ new spending strategies have only been strengthened and further entrenched due to recent events. 

One may wonder how CAPEX spending by semiconductor suppliers relates to the daily life of a contract manufacturer (CM), meaning both original design manufacturers (ODMs) and electronic manufacturing service providers (EMS), or possibly even to original equipment manufacturers (OEMs), who seem to hold the purse-strings from the perspective of many downstream.


The CAPEX strategies adopted by foundries are, in fact, quietly shifting the balance of power in the semiconductor industry; the effects of which will be seen during the next few years. Coupling CAPEX strategies with “fab-lite” approaches, increased outsourcing upstream, consolidations all along the supply chain, and skyrocketing production costs for smaller chip geometries, the role of foundries is changing. Supply and demand forces are being rebalanced by foundries to maximize their return on costly investments rather than focusing on being the growth driver and innovator for the entire industry. These strategic changes by foundries will be felt in a variety of ways, but most tangibly in supply declines coupled with tightened allocation of capacity, resulting in rising ASPs, among other effects.

The present outlook
CAPEX outlooks continue to revise downward, just as most numbers are doing across most industries and macro economies. Financial industry analysts, such as Barclays Capital (formerly Lehman Brother’s Equity Research titles), UBS, and CitiGroup are forecasting increasingly lowered spending levels through 2009. October forecasts for the year 2009 (Y09) are showing 15% reductions in CAPEX spending, down from flat to single digit increases over the already low 2008 levels. As reported in EETimes Europe 11/17/2008, Gartner has further downgraded 2009E global semiconductor revenues by 5.2 percent, from the October forecast of 12.8 percent to 18 percent; equating to a mere 1 percent increase over 2008E revenues (http://eetimes.eu/germany/212100180). The effect of the revenue degradation leads Gartner to “expect a capital spending decline of about 17 percent in 2009 and capital equipment to drop roughly 18 percent.” (ibid.) The inventory glut and continued declining ASPs in memory, in addition to the opacity of macro-economic states, are causing foundries to increase the belt tightening and move their focus to controlling costs and improving profitability.

The most immediate effect of continued CAPEX decreases on the industry will be in changing approaches to ordering: just-in-time capacity orders with partial or significant up-front payments required, tightening of leading edge process technologies and logic ICs, equipment orders being placed much closer to use dates, and equipment re-use set to gain prevalence (akin to the Intel model) (cf. DigiTimes 7/22/2008, 9/9/2008, 9/11/2008 and 10/31/2008; Barclays Capital Semiconductor Capital Equipment Sector View 10/02/2008; www.eetimes.eu/semi/211600640).

The equipment re-use point should not be glossed over. Ramifications of equipment re-use directly effect the adoption rate of new nanometer architectures as well as any shifts to 450mm wafer sizes. These ‘stalls’ in technology migration will further slow the rate of Moore’s Law which has hit ‘speed bumps’ due to the exponential increases in engineering challenges posed by smaller geometries. Additionally, the stalls in migration will also constrain research and development (R&D) tracks, favoring instead 3D Through Silica Via (3D-TSV) ICs, MEMS, analog ICs, and selected memory investment (e.g., favoring SSD and NAND bit growth for 2012 pick up and penetration) (cf., http://www.solid-state.com
/display_article/343944/5/none/none/TCHNE/Seagate,-Fujitsu-discuss-SSD-strategies). An important upside to these changes is the serious exploration of alternatives to increasingly smaller architectures for improving performance and capacity.

Foundry strategies impact the entire supply chain
As foundries increasingly downscale their CAPEX forecasts and look to maximize profitability (a newer strategy, one that no longer focuses on market share), the first place that the semiconductor supply chain will be feeling the impact of these changes is in capacity plans at foundries (DigiTimes 7/22/2008). Presently, most foundries have been evaluating the efficiency of their individual fabs and are retiring the less efficient 200mm lines and/or plants in favor of 300mm capacity; 450mm is now pushed well into the next decade for most. This has an immediate supply reduction effect for the supply chain, efficiencies aside for the foundries, principally affecting DRAM. Such capacity cuts for DRAM are, of course, not unwelcomed, as ASPs have fallen to below cost levels and continue to show no significant drivers for recovery. Individual companies, such as Hynix and Samsung, have tried throughout 2008 to boost ASPs through various pricing and production strategies. Unfortunately, none of these efforts have had the long-term rebounding effects desperately needed by the memory sector.

The oversupply in the DRAM channel is not forecasted to rebalance in the near future, leading to continued declining CAPEX for DRAM through 2009 and beyond. There is simply no good financial data to encourage foundries to spend precious capital on DRAM capacity nor new technologies at this time. Barclays Capital Semiconductor Capital Equipment report forecasts a -19% CAPEX for DRAM in 2009 (10/02/2008, p. 15). Figure 1 presents the CAPEX trend from 2004 though 2009E.


Figure 1. DRAM CAPEX Outlook Source: Barclays Capital Report, Semiconductor Capital Equipment Oct. 2, 2008, p.14

The redeeming moment for DRAM might be found in 2009 with the transition to DDR3 as new PCs shipping with Intel’s Nehalem processor that requires DDR3. Unfortunately, there is a downside to this hope, namely that “a corresponding DDR3 memory chip costs at least 2x the price of DDR2 chip and the performance benefits are not obvious with current processors or DDR3 frequencies.” (Barclays, ibid, p. 15)

NAND will certainly face a different future than DRAM, but as a driver of CAPEX, the immediate future continues to be conservative with negative forecasts for 2009 due to questionable demand and continued inventory re-balancing. The spending that is most likely to occur will be in the replacement of 200mm wafer capacity to the more efficient 300mm sizes. The operative driver here is efficiency. Foundries’ core strategy is to increase efficiency to protect their margins, while maintaining market share, but no longer at the cost of profitability (www.isuppli.com/NewsDetail.aspx?ID=19669; www.solid-state.com/display_article/343424/5/none/none/TCHNE/Fabs,-toolmakers
-using-downturn-to-gear-up-for-next-upcycle). Since NAND shows promise of a robust future with SSD penetration forecasted by 2010, NAND CAPEX is not expected to be as severely slashed as DRAM. Figure 2 presents the CAPEX trend for flash from 2004 through 2009E.


Figure 2. Flash CAPEX Outlook Source: Barclays Capital Report, Semiconductor Capital Equipment Oct. 2, 2008, p.18

However, caution reigns and healthy spending is not likely before late 2009 or 2010, due to the price point break for SSDs, based on a survey of industry analysts and company transcripts. However, if the price point for SSDs is not reached during 2009, then “this would push further mass adoption [of SSD] to 2011. This is a very real possibility and is a possible downside for NAND” (Barclays, ibid. p.22).

New geometries
The shift to smaller architectures will, of course, happen, but the pace and the players involved in this transition are less certain. The costs to foundries of these shrinking geometries are rising exponentially because of the complexity in engineering and the new tools required to manufacture at these scales. Only the Tier I foundries (the top five to seven) will be able to compete in cutting edge technologies and smaller geometries. Tier II players have already been severely hurt by the memory collapse and their ability to continue to compete is questioned by most financial and industry analysts. Adding to Tier II players’ challenges, are the slowing PC sales due to consumer spending decreases coupled with credit market problems that now prohibit them from beginning transitions necessary to compete with Tier I players’ significant coffers. Tier I players have been operating with an average margin of 20-30%, meaning that while they have certainly been hurt by the economic and memory market downturns, their financial strategies and market diversity is buffering some of the negative impacts. Furthermore, they have money in the bank, which, during credit market conditions today, is a considerable advantage (www.eetimessupplynetwork.com/211800147; http://www.solid-state.com/articles/print.html?id=

The move to smaller nanometers and larger wafer sizes will be determined by the Tier I foundries who have control of the significant capital needed; and they are not on a spending spree presently. Rather, during this down-cycle time, reports from all of the major foundries show increases in R&D, lean manufacturing practices, green and energy efficient manufacturing, and retirement of less profitable lines and fabs. The foundries are using this time to improve their manufacturing processes and to consider carefully their investments in future technologies.

Outsourcing and ‘fab-lite’
Outside of Intel, logic has moved to what has been termed a ‘fab-lite’ approach. The term ‘fab-lite’ intends to capture the business financial strategy that many integrated device manufacturers (IDMs) adopted due to the high costs of building and maintaining fabs. Today’s supply chain includes a pairing of the IDMs with foundries to produce the latest logic ICs.

Intel, however, has continued to follow its own strategy of in-house production, “Intel has found it has been able to save money by convincing equipment vendors to put in features that are extendible for at least two generations.” (Barclays, ibid. p.24) Intel is forecasted to be the sole company increasing its CAPEX by 3% year-over-year for 2008 (Barclays, ibid. p.25). As a result, when considering the logic sector, Intel’s ability to maintain a premier position becomes much clearer. Intel’s CAPEX strategy has long focused on the return of investment capital (ROIC) and it has been able to require of their equipment suppliers longer lifespan from its tools (cf., www.eetimes.eu/germany/211600637).

There is an important caveat to the fab-lite trend. Foundries are increasingly flexing their financial muscles in directing equipment investments and re-investments that determine capacity and the type of chips to be produced. The fact that more outsourcing by IDMs is occurring adds to the shift in the balance of power in the industry toward foundries.

Changing times and changing strategies mean changing relationships
Not only are foundries changing their financial strategies to improve profitability through efficiencies across the board, they are also more keenly aware of the importance of the news of continued global GDP decreases have on them as a business and on the semiconductor industry as a whole. Consumer confidence and decreased spending is affecting the entire semiconductor supply chain, all the way up to foundries, and all of the players are responding, whether proactively or reactively. Tier I foundries are responding by increasing their cautious stand on reduced capacity, even during the holiday season. Foundries are less willing to invest in the production of either leading- or trailing-edge technologies beyond what the markets are realistically able to bear.

As a result of this caution, the ramp to 45nm has been much slower than otherwise expected and further slowing is expected for 32nm and below. Foundries do realize that the end-market consumer’s caution in spending trickles up to OEMs’ caution in product cycles and forecasts which further trickles up to the demand for product from foundries, meaning that caution is observed when investing in new capacity or new tools:

Foundries have become much more cautious in their advanced node and capacity investments. When leading customers skip nodes or change their minds about product roadmaps, foundries (which by their nature attempt to suit their capacity to the largest number of customers and products possible) can no longer afford to add new advanced capacity on faith alone (build it and they will come). Instead, they adopt the approach we have seen over the last year – ordering 2,000 to 3,000 of capacity at a time, just in time to meet their customers’ demands and then watching how things play out. (Barclays, ibid. p.31)

Utilization rates have traditionally been a gauge to foundry spending for increasing capacity (www.purchasing.com/article/CA6584604.html; http://www.eetimes.com/showArticle.jhtml?articleID=211601056&cid=NL_eet). This too has changed and is telling of foundries’ new willingness to put their profitability over their clients’ demands:

The foundries have adopted a more conservative mindset and business model, where they are willing to tolerate higher utilization rates and avoid aggressive advanced node transitions in an effort to 1) increase their leverage and bargaining power with customers when setting prices and 2) align their advanced capacity with actual demand rather than projected demand. (Barclays, ibid., p. 29)

Figure 3 presents CAPEX levels from 2007 through 2009E and the 2008E utilization levels for five of the leading foundries.


Figure 3. CAPEX and Utilization Levels for Five Leading Fabs Sources: DigiTimes 9/25/08, 10/31/08, 11/03/08, 11/13/08; FabTech 10/31/08; EDN.com 7/31/08, 10/29/08

In sum, there are significant changes to the financial strategies being employed by foundries. There are multiple reasons for these changes, but the continued decline in CAPEX has been a telling indicator of this strategy. The ramifications of these strategic changes are manifold, but the most important change for the entire supply chain, is the rebalancing of power that is underway in the semiconductor industry. Foundries are increasing their positions and changing their relationships with their clients due to a new business focus on profitability, efficiency and greater comfort levels with higher utilization rates.

CAPEX at foundries will rebound, but most analysts do not expect that to occur until 2010 at the earliest, while some are now looking to 2011. Beyond the obvious need for renewed consumer spending in advanced economies, drivers for a CAPEX rebound will include ASPs back in more profitable territory, SSD penetration, 45nm adoption at high-volume levels, inventory corrections finalized in memory, and a more positive macro economic climate. “An improvement in the outlook for the semiconductor market and its supply chain is dependent on clarity and stabilization of the world’s economy.” (www.semi.org/en/MarketInfo/ctr_026653)

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